Introducing UltrafastSecp256k1: A Multi-Architecture Exploration of Secp256k1 Optimizations

The recent optimization sprint focused on the RISC-V architecture, specifically targeting the Milk-V Mars (SiFive U74), has yielded significant improvements in performance. By employing U74-specific in-order scheduling techniques, a notable 34% increase in verification speed was achieved. This enhancement is a strategic component of the v3.11 development roadmap for the UltrafastSecp256k1 library. The library's advancements are integral to its mission of becoming the preferred solution for resource-constrained IoT devices, where efficient utilization of computational cycles is paramount. The results from this optimization effort underscore the effectiveness of the tailored approach in harnessing the full potential of the RISC-V architecture for specific application needs, marking a significant milestone in the ongoing development and optimization of secure, high-performance libraries for the IoT ecosystem.